TQt4 port piklab

This enables compilation under both Qt3 and Qt4


git-svn-id: svn://anonsvn.kde.org/home/kde/branches/trinity/applications/piklab@1238822 283d02a7-25f6-0310-bc7c-ecb5cbfe19da

1 files changed, 24 insertions, 24 deletions

diff --git a/src/devices/pic/base/pic_register.h b/src/devices/pic/base/pic_register.h
index 41da020..bb12657 100644
--- a/src/devices/pic/base/pic_register.h
+++ b/src/devices/pic/base/pic_register.h
@@ -9,7 +9,7 @@
 #ifndef PIC_REGISTER_H
 #define PIC_REGISTER_H
 
-#include <qmap.h>
+#include <tqmap.h>
 
 #include "devices/base/register.h"
 #include "pic.h"
@@ -29,8 +29,8 @@ enum RegisterBitProperty { RegisterBitUnused = 0x0,
   RegisterBitOnlySoftwareClear = 0x4, RegisterBitOnlySoftwareSet = 0x8,
   MaxRegisterBitProperty = 0x15
 };
-Q_DECLARE_FLAGS(RegisterBitProperties, RegisterBitProperty)
-Q_DECLARE_OPERATORS_FOR_FLAGS(RegisterBitProperties)
+TQ_DECLARE_FLAGS(RegisterBitProperties, RegisterBitProperty)
+TQ_DECLARE_OPERATORS_FOR_FLAGS(RegisterBitProperties)
 enum RegisterBitState { RegisterBitUnknown = 0, RegisterBitLow, RegisterBitHigh,
   RegisterBitUnchanged, RegisterBitDepends, RegisterBitDependsConfig, Nb_RegisterBitStates
 };
@@ -72,26 +72,26 @@ public:
   uint firstGprIndex() const; // in first bank
 
   uint nbBanks, accessBankSplit, unusedBankMask;
-  QMap<QString, RegisterData> sfrs;
-  QMap<Address, QString> sfrNames; // address -> name
-  QValueVector<QValueVector<RangeData> > mirrored;
-  QValueVector<RangeData> unused;
-  QMap<QString, CombinedData> combined;
+  TQMap<TQString, RegisterData> sfrs;
+  TQMap<Address, TQString> sfrNames; // address -> name
+  TQValueVector<TQValueVector<RangeData> > mirrored;
+  TQValueVector<RangeData> unused;
+  TQMap<TQString, CombinedData> combined;
 
   virtual Device::RegisterProperties properties(Address address) const;
   RegisterType type(Address address) const;
-  QString label(Address address) const;
-  virtual QValueList<Register::TypeData> relatedRegisters(const Register::TypeData &data) const;
+  TQString label(Address address) const;
+  virtual TQValueList<Register::TypeData> relatedRegisters(const Register::TypeData &data) const;
 
   virtual bool hasPort(uint index) const;
   virtual int portIndex(Address address) const;
-  virtual QString portName(uint index) const;
+  virtual TQString portName(uint index) const;
   bool hasTris(uint index) const;
-  QString trisName(uint index) const;
+  TQString trisName(uint index) const;
   bool hasLatch(uint index) const;
-  QString latchName(uint index) const;
+  TQString latchName(uint index) const;
   virtual bool hasPortBit(uint index, uint bit) const;
-  virtual QString portBitName(uint index, uint bit) const;
+  virtual TQString portBitName(uint index, uint bit) const;
 
 private:
   const Data &_data;
@@ -99,16 +99,16 @@ private:
 };
 
 //-----------------------------------------------------------------------------
-QDataStream &operator <<(QDataStream &s, const RangeData &rd);
-QDataStream &operator >>(QDataStream &s, RangeData &rd);
-QDataStream &operator <<(QDataStream &s, const RegisterBitData &rbd);
-QDataStream &operator >>(QDataStream &s, RegisterBitData &rbd);
-QDataStream &operator <<(QDataStream &s, const RegisterData &rd);
-QDataStream &operator >>(QDataStream &s, RegisterData &rd);
-QDataStream &operator <<(QDataStream &s, const CombinedData &rd);
-QDataStream &operator >>(QDataStream &s, CombinedData &rd);
-QDataStream &operator <<(QDataStream &s, const RegistersData &rd);
-QDataStream &operator >>(QDataStream &s, RegistersData &rd);
+TQDataStream &operator <<(TQDataStream &s, const RangeData &rd);
+TQDataStream &operator >>(TQDataStream &s, RangeData &rd);
+TQDataStream &operator <<(TQDataStream &s, const RegisterBitData &rbd);
+TQDataStream &operator >>(TQDataStream &s, RegisterBitData &rbd);
+TQDataStream &operator <<(TQDataStream &s, const RegisterData &rd);
+TQDataStream &operator >>(TQDataStream &s, RegisterData &rd);
+TQDataStream &operator <<(TQDataStream &s, const CombinedData &rd);
+TQDataStream &operator >>(TQDataStream &s, CombinedData &rd);
+TQDataStream &operator <<(TQDataStream &s, const RegistersData &rd);
+TQDataStream &operator >>(TQDataStream &s, RegistersData &rd);
 
 } // namespace