Added KDE3 version of PikLab

git-svn-id: svn://anonsvn.kde.org/home/kde/branches/trinity/applications/piklab@1095639 283d02a7-25f6-0310-bc7c-ecb5cbfe19da

1 files changed, 311 insertions, 0 deletions

diff --git a/src/devices/pic/xml_data/18F1230.xml b/src/devices/pic/xml_data/18F1230.xml
new file mode 100644
index 0000000..043687a
--- /dev/null
+++ b/src/devices/pic/xml_data/18F1230.xml
@@ -0,0 +1,311 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F1230" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x1E00" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="022956" datasheet="39758" progsheet="39752" erratas="80308" />
+
+<!--* Checksums ************************************************************-->
+<!--  <checksums>
+    <checksum protected_blocks="0"              bchecksum="0xF33E" cchecksum="0xF294" />
+    <checksum protected_blocks="1" bbsize="256" bchecksum="0xF2FE" cchecksum="0xF254" />
+    <checksum protected_blocks="1" bbsize="512" bchecksum="0xF30E" cchecksum="0xF264" />
+    <checksum protected_blocks="2"              bchecksum="0xF30D" cchecksum="0xF263" />
+    <checksum protected_blocks="3"              bchecksum="0xF31B" cchecksum="0xF271" />
+  </checksums>
+-->
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9.5" max="12.5" nominal="12" />
+  <voltages name="vdd_prog"       min="3"   max="5.5"  nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x000FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x00007F" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO2" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO1" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOR_OFF"        />
+      <value value="0x02" name="Software" cname="_BOR_SBORENCTRL" />
+      <value value="0x04" name="On_run"   cname="_BOR_BOACTIVE"   />
+      <value value="0x06" name="On"       cname="_BOR_BOHW"       />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x0E" >
+    <mask name="PWMPIN" value="0x02" >
+      <value value="0x00" name="On"  cname="_PWMPIN_ON"  />
+      <value value="0x02" name="Off" cname="_PWMPIN_OFF" />
+    </mask>
+    <mask name="LPOL"   value="0x04" >
+      <value value="0x00" name="low"  cname="_LPOL_LOW"  />
+      <value value="0x04" name="high" cname="_LPOL_HIGH" />
+    </mask>
+    <mask name="HPOL"   value="0x08" >
+      <value value="0x00" name="low"  cname="_HPOL_LOW"  />
+      <value value="0x08" name="high" cname="_HPOL_HIGH" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x81" >
+    <mask name="FLTAMX"  value="0x01" >
+      <value value="0x00" name="RA7" cname="_FLTAMX_RA7" />
+      <value value="0x01" name="RA5" cname="_FLTAMX_RA5" />
+    </mask>
+    <mask name="T1OSCMX" value="0x08" >
+      <value value="0x00" name="RB2" cname="_T1OSCMX_HIGH" />
+      <value value="0x08" name="RA6" cname="_T1OSCMX_LOW"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x81" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x30" >
+      <value value="0x00"    name="256" cname="_BBSIZ_BB256" />
+      <value value="default" name="512" cname="_BBSIZ_BB512" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200/0400:07FF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"            cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200/0400:07FF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"            cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200/0400:07FF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"            cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>