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-rw-r--r--test/gputils/blinker/blinker.asm148
-rw-r--r--test/gputils/blinker/blinker.piklab89
-rw-r--r--test/gputils/blinker18/blinker_18.asm59
-rw-r--r--test/gputils/blinker18/blinker_18.piklab52
-rw-r--r--test/gputils/compile_error/blinker.asm145
-rw-r--r--test/gputils/compile_error/compile_error.piklab74
-rw-r--r--test/gputils/project/test.asm60
-rw-r--r--test/gputils/project/test.inc1
-rw-r--r--test/gputils/project/test.libbin0 -> 1986 bytes
-rw-r--r--test/gputils/project/test2.asm6
-rw-r--r--test/gputils/project/test_project.piklab52
-rw-r--r--test/gputils/project/test_project.pikprj20
-rw-r--r--test/gputils/standalone/test_stand_alone.asm53
13 files changed, 759 insertions, 0 deletions
diff --git a/test/gputils/blinker/blinker.asm b/test/gputils/blinker/blinker.asm
new file mode 100644
index 0000000..42f946b
--- /dev/null
+++ b/test/gputils/blinker/blinker.asm
@@ -0,0 +1,148 @@
+
+ #include <p16f877.inc> ; processor specific variable definitions
+
+ __CONFIG _CP_OFF & _WDT_OFF & _BODEN_OFF & _PWRTE_ON & _XT_OSC & _WRT_ENABLE_ON & _LVP_OFF & _CPD_OFF
+ ;__CONFIG _CP_OFF & _WDT_OFF & _PWRTE_ON & _EXTRC_CLKOUT
+
+;**********************************************************************
+M_SAVE_STATE macro
+ movwf w_saved
+ movfw STATUS
+ movwf status_saved
+ endm
+
+M_RESTORE_STATE macro
+ movfw status_saved
+ movwf STATUS
+ swapf w_saved,f
+ swapf w_saved,w
+ endm
+
+BANK0 = 0x0
+BANK1 = 0x80
+BANK2 = 0x100
+BANK3 = 0x180
+
+;**********************************************************************
+INT_VAR UDATA_SHR 0x20
+w_saved RES 1
+status_saved RES 1
+pclath_saved RES 1
+INT1_VAR UDATA_SHR 0xA0
+w_saved1 RES 1
+
+TEMP_VAR UDATA_SHR
+count RES 1
+count2 RES 1
+ledA RES 1
+ledC RES 1
+ledB RES 1
+
+;**********************************************************************
+STARTUP CODE 0x000 ; processor reset vector
+ nop ; for debugger
+ movlw high start ; load upper byte of 'start' label
+ movwf PCLATH ; initialize PCLATH
+ goto start ; go to beginning of program
+
+;**********************************************************************
+INT_VECTOR CODE 0x004 ; interrupt vector location
+ goto interrupt
+
+;**********************************************************************
+PROG1 CODE
+interrupt
+ M_SAVE_STATE
+ M_SAVE_STATE ; try using twice a macro
+
+; increment duty cycle
+; btfss CCP1CON ^ BANK0,4
+; goto duty_cycle_inc_bit0
+; bcf CCP1CON ^ BANK0,4
+; btfss CCP1CON ^ BANK0,5
+; goto duty_cycle_inc_bit1
+; bcf CCP1CON ^ BANK0,5
+; incfsz CCPR1L ^ BANK0,f
+; goto update_duty_cycle_done
+;duty_cycle_inc_bit0
+; bsf CCP1CON ^ BANK0,4
+; goto update_duty_cycle_done
+;duty_cycle_inc_bit1
+; bsf CCP1CON ^ BANK0,5
+;update_duty_cycle_done
+
+; increment count
+ decfsz count,1
+ goto done
+ movlw .10
+ movwf count
+
+; blink and output
+ movfw ledB
+ xorlw B'00001111'
+ movwf ledB
+ movwf PORTB
+
+done
+ bcf INTCON,2 ; reset TMR0 interrupt flag
+ M_RESTORE_STATE
+ retfie ; return from interrupt
+
+;**********************************************************************
+start
+; initialize microchip
+ clrf TMR0 ^ BANK0
+ clrf INTCON ^ BANK0
+; clrf PORTA ^ BANK0
+ clrf PORTB ^ BANK0
+; clrf PORTC ^ BANK0
+; clrf PORTD ^ BANK0
+; clrf PORTE ^ BANK0
+ banksel TRISA ; bank 1
+; clrf TRISA ^ BANK1 ; all outputs
+ clrf TRISB ^ BANK1 ; all outputs
+; clrf TRISC ^ BANK1 ; all outputs
+; clrf TRISD ^ BANK1 ; all outputs
+; clrf TRISE ^ BANK1 ; all outputs
+ movlw B'11010101' ; set prescaler to 64
+ movwf OPTION_REG ^ BANK1 ; and start TMR0 (internal source clock)
+; movlw B'00000110' ; set PORTA and PORTE to be all digital
+; movwf ADCON1 ^ BANK1
+ banksel INTCON ; back to bank 0
+ bsf INTCON,T0IE ; enable TMR0 interrupt
+ bsf INTCON,GIE ; enable all interrupts
+
+; initialize PWM
+; CLRF CCP1CON ^ BANK0 ; disable CCP module
+; CLRF TMR2 ^ BANK0 ; clear Timer2 (also set the pre-scaler to 1)
+; MOVLW .1
+; MOVWF CCPR1L ^ BANK0 ; set duty cycle = (CCPR1L+1)/(PR2+1) [25% for (31+1)/(127+1)]
+; banksel PR2 ; select bank 1
+; MOVLW .255
+; MOVWF PR2 ^ BANK1 ; set period = Fosc/4/pre-scaler/(PR2+1)
+; BCF TRISC ^ BANK1,2 ; set CCP1 pin as output
+; banksel PIR1 ; back to bank 0
+; MOVLW B'001100'
+; MOVWF CCP1CON ^ BANK0 ; set PWM mode (the 2 LSBs of the duty cycle are set to '00')
+; BSF T2CON ^ BANK0,TMR2ON ; Timer2 starts to increment
+
+ ; The CCP1 interrupt is disabled,
+ ; do polling on the TMR2 Interrupt flag bit
+;PWM_Period_Match
+; BTFSS PIR1, TMR2IF
+; GOTO PWM_Period_Match
+
+ ; Update this PWM period and the following PWM Duty cycle
+; BCF PIR1, TMR2IF
+
+; initialize variables
+ movlw B'00000101'
+ movwf ledB
+ movlw .10
+ movwf count
+
+; loop forever
+ goto $
+
+;**********************************************************************
+ END
diff --git a/test/gputils/blinker/blinker.piklab b/test/gputils/blinker/blinker.piklab
new file mode 100644
index 0000000..4ac7729
--- /dev/null
+++ b/test/gputils/blinker/blinker.piklab
@@ -0,0 +1,89 @@
+<!DOCTYPE piklab>
+<piklab>
+ <general>
+ <files>
+ <item>blinker.asm</item>
+ </files>
+ <version>0.1</version>
+ <description/>
+ <device>16F877</device>
+ <tool>gputils</tool>
+ <custom_linker_script/>
+ <is_library>true</is_library>
+ <output_type>executable</output_type>
+ <opened_files>
+ <item>blinker.asm</item>
+ </opened_files>
+ </general>
+ <assembler>
+ <warning_level>0</warning_level>
+ <include_dir/>
+ <custom_options/>
+ <has_custom_arguments>false</has_custom_arguments>
+ <custom_arguments>
+ <item>-c</item>
+ <item>-I$(SRCPATH)</item>
+ <item>-p%DEVICE</item>
+ <item>-w1</item>
+ <item>%I</item>
+ <item>-g</item>
+ <item>-I/usr/share/gputils/header</item>
+ </custom_arguments>
+ <includes>
+ <item>$(SRCPATH)</item>
+ </includes>
+ </assembler>
+ <linker>
+ <debug>0</debug>
+ <hex_format>inhx32</hex_format>
+ <object_dir/>
+ <custom_options/>
+ <format>inhx32</format>
+ <custom_linker_script>/home/nicolas/prog/piklab/piklab/test/sdcc/16f873.lkr</custom_linker_script>
+ <has_custom_arguments>false</has_custom_arguments>
+ <custom_libraries/>
+ <custom_arguments>
+ <item>-o%O</item>
+ <item>-c</item>
+ <item>-ainhx32</item>
+ <item>-m</item>
+ <item>-I$(SRCPATH)</item>
+ <item>$LKR(-s%LKR)</item>
+ <item>%OBJS</item>
+ <item>%LIBS</item>
+ </custom_arguments>
+ <includes>
+ <item>$(SRCPATH)</item>
+ </includes>
+ </linker>
+ <sdcc>
+ <custom_options/>
+ <include_dir/>
+ </sdcc>
+ <compiler>
+ <has_custom_arguments>false</has_custom_arguments>
+ <custom_options/>
+ <warning_level>0</warning_level>
+ <custom_arguments>
+ <item>-I$(SRCPATH)</item>
+ <item>-I</item>
+ <item>-p</item>
+ <item>%DEVICE</item>
+ <item>%I</item>
+ </custom_arguments>
+ <includes>
+ <item>$(SRCPATH)</item>
+ </includes>
+ </compiler>
+ <librarian>
+ <has_custom_arguments>false</has_custom_arguments>
+ <custom_options/>
+ <custom_arguments>
+ <item>-c</item>
+ <item>%O</item>
+ <item>%OBJS</item>
+ <item>%LIBS</item>
+ </custom_arguments>
+ </librarian>
+ <editors/>
+</piklab>
diff --git a/test/gputils/blinker18/blinker_18.asm b/test/gputils/blinker18/blinker_18.asm
new file mode 100644
index 0000000..4a00daf
--- /dev/null
+++ b/test/gputils/blinker18/blinker_18.asm
@@ -0,0 +1,59 @@
+; LIST p=18F452 ;PIC18F452 is the target processor
+ INCLUDE "p18f452.inc" ;Include file with register defines
+
+ ;Programming Configuration Information
+ __CONFIG _CONFIG1H, _XT_OSC_1H ;XT HS PLL (10MHz XTAL)
+ __CONFIG _CONFIG2L, _BOR_ON_2L & _PWRT_ON_2L ;Power-Up timer ON, Brown-out at 2.7V
+
+ __CONFIG _CONFIG2H, _WDT_OFF_2H & _WDTPS_1_2H ;WDT OFF for debug
+ __CONFIG _CONFIG3H, _CCP2MX_OFF_3H ;CCP Module Off
+ __CONFIG _CONFIG4L, _LVP_OFF_4L & _DEBUG_OFF_4L
+
+ ;UnProtect entire device program space for DEBUG
+ __CONFIG _CONFIG5L, _CP0_OFF_5L & _CP1_OFF_5L & _CP2_OFF_5L
+ __CONFIG _CONFIG5H, _CPB_OFF_5H & _CPD_OFF_5H
+ __CONFIG _CONFIG6L, _WRT0_OFF_6L & _WRT1_OFF_6L & _WRT2_OFF_6L
+ __CONFIG _CONFIG6H, _WRTC_OFF_6H & _WRTB_OFF_6H & _WRTD_OFF_6H
+
+;Assorted miscellaneous general-purpose registers
+DlyRegA equ 0x3D ;Temp register for delay
+DlyRegB equ 0x3E ;Temp register for delay
+DlyRegC equ 0x3F ;Temp register for delay
+
+STARTUP CODE 0x000
+ nop ;Required for ICD Debugging
+ nop
+ goto Main
+
+Main
+ clrf BSR,A ;Ensure BSR register points to first block
+ clrf TRISB,A
+ movlw 0x7
+ movwf PORTB,A
+
+Loop
+ bsf PORTB,0 ;Turn the LED on
+ call LongDelay
+ bcf PORTB,0 ;Turn the LED off
+ call LongDelay
+ goto Loop
+
+;A long delay
+LongDelay
+ movlw H'10' ;Adjust to produce a suitable time delay
+ movwf DlyRegA
+ldelayc movlw H'10'
+ movwf DlyRegB
+ldelayb movlw H'FF'
+ movwf DlyRegC
+ldelaya decfsz DlyRegC,f ;Inner Loop
+ goto ldelaya
+ decfsz DlyRegB,f ;Middle Loop
+ goto ldelayb
+ decfsz DlyRegA,f ;Outer Loop
+ goto ldelayc
+ return
+
+ END
+
+
diff --git a/test/gputils/blinker18/blinker_18.piklab b/test/gputils/blinker18/blinker_18.piklab
new file mode 100644
index 0000000..c1582de
--- /dev/null
+++ b/test/gputils/blinker18/blinker_18.piklab
@@ -0,0 +1,52 @@
+<!DOCTYPE piklab>
+<piklab>
+ <general>
+ <device>18F452</device>
+ <files>
+ <item>blinker_18.asm</item>
+ </files>
+ <watched_ios>
+ <item>3969</item>
+ </watched_ios>
+ <description/>
+ <version>0.1</version>
+ <tool>gputils</tool>
+ <opened_files>
+ <item>blinker_18.asm</item>
+ </opened_files>
+ </general>
+ <assembler>
+ <custom_options/>
+ <warning_level>0</warning_level>
+ <has_custom_arguments>false</has_custom_arguments>
+ <custom_arguments>
+ <item>-c</item>
+ <item>-I$(SRCPATH)</item>
+ <item>-w0</item>
+ <item>%I</item>
+ <item>-g</item>
+ </custom_arguments>
+ <includes>
+ <item>$(SRCPATH)</item>
+ </includes>
+ </assembler>
+ <linker>
+ <custom_options/>
+ <format>inhx32</format>
+ <custom_libraries/>
+ <has_custom_arguments>false</has_custom_arguments>
+ <custom_arguments>
+ <item>-o%O</item>
+ <item>-c</item>
+ <item>-ainhx8m</item>
+ <item>-m</item>
+ <item>-I$(SRCPATH)</item>
+ <item>$LKR(-s%LKR)</item>
+ <item>%OBJS</item>
+ <item>%LIBS</item>
+ </custom_arguments>
+ <includes>
+ <item>$(SRCPATH)</item>
+ </includes>
+ </linker>
+</piklab>
diff --git a/test/gputils/compile_error/blinker.asm b/test/gputils/compile_error/blinker.asm
new file mode 100644
index 0000000..cd9f495
--- /dev/null
+++ b/test/gputils/compile_error/blinker.asm
@@ -0,0 +1,145 @@
+; list p=16f871 ; list directive to define processor
+ #include <p16f871.inc> ; processor specific variable definitions
+
+ __CONFIG _CP_OFF & _WDT_OFF & _BODEN_OFF & _PWRTE_ON & _XT_OSC & _WRT_ENABLE_ON & _LVP_OFF & _CPD_OFF
+ ;__CONFIG _CP_OFF & _WDT_OFF & _PWRTE_ON & _EXTRC_CLKOUT
+
+;**********************************************************************
+M_SAVE_STATE macro
+ mov wf w_saved
+ movfw STATUS
+ movwf status_saved
+ endm
+
+M_RESTORE_STATE macro
+ movfw status_saved
+ movwf STATUS
+ swapf w_saved,f
+ swapf w_saved,w
+ endm
+
+BANK0 = 0x0
+BANK1 = 0x80
+BANK2 = 0x100
+BANK3 = 0x180
+
+;**********************************************************************
+INT_VAR UDATA_SHR
+w_saved RES 1 ; variable used for context saving
+status_saved RES 1 ; variable used for context saving
+
+TEMP_VAR UDATA_SHR
+count RES 1
+count2 RES 1
+ledA RES 1
+ledC RES 1
+ledB RES 1
+
+;**********************************************************************
+STARTUP CODE 0x000 ; processor reset vector
+ nop ; for debugger
+ movlw high start ; load upper byte of 'start' label
+ movwf PCLATH ; initialize PCLATH
+ goto start ; go to beginning of program
+
+;**********************************************************************
+INT_VECTOR CODE 0x004 ; interrupt vector location
+ goto interrupt
+
+;**********************************************************************
+PROG1 CODE
+interrupt
+ M_SAVE_STATE
+ M_SAVE_STATE ; try using twice a macro
+
+; increment duty cycle
+; btfss CCP1CON ^ BANK0,4
+; goto duty_cycle_inc_bit0
+; bcf CCP1CON ^ BANK0,4
+; btfss CCP1CON ^ BANK0,5
+; goto duty_cycle_inc_bit1
+; bcf CCP1CON ^ BANK0,5
+; incfsz CCPR1L ^ BANK0,f
+; goto update_duty_cycle_done
+;duty_cycle_inc_bit0
+; bsf CCP1CON ^ BANK0,4
+; goto update_duty_cycle_done
+;duty_cycle_inc_bit1
+; bsf CCP1CON ^ BANK0,5
+;update_duty_cycle_done
+
+; increment count
+ decfsz count,1
+ goto done
+ movlw .10
+ movwf count
+
+; blink and output
+ movfw ledB
+ xorlw B'00001111'
+ movwf ledB
+ movwf PORTB
+
+done
+ bcf INTCON,2 ; reset TMR0 interrupt flag
+ M_RESTORE_STATE
+ retfie ; return from interrupt
+
+;**********************************************************************
+start
+; initialize microchip
+ clrf TMR0 ^ BANK0
+ clrf INTCON ^ BANK0
+; clrf PORTA ^ BANK0
+ clrf PORTB ^ BANK0
+; clrf PORTC ^ BANK0
+; clrf PORTD ^ BANK0
+; clrf PORTE ^ BANK0
+ banksel TRISA ; bank 1
+; clrf TRISA ^ BANK1 ; all outputs
+ clrf TRISB ^ BANK1 ; all outputs
+; clrf TRISC ^ BANK1 ; all outputs
+; clrf TRISD ^ BANK1 ; all outputs
+; clrf TRISE ^ BANK1 ; all outputs
+ movlw B'11010101' ; set prescaler to 64
+ movwf OPTION_REG ^ BANK1 ; and start TMR0 (internal source clock)
+; movlw B'00000110' ; set PORTA and PORTE to be all digital
+; movwf ADCON1 ^ BANK1
+ banksel INTCON ; back to bank 0
+ bsf INTCON,T0IE ; enable TMR0 interrupt
+ bsf INTCON,GIE ; enable all interrupts
+
+; initialize PWM
+; CLRF CCP1CON ^ BANK0 ; disable CCP module
+; CLRF TMR2 ^ BANK0 ; clear Timer2 (also set the pre-scaler to 1)
+; MOVLW .1
+; MOVWF CCPR1L ^ BANK0 ; set duty cycle = (CCPR1L+1)/(PR2+1) [25% for (31+1)/(127+1)]
+; banksel PR2 ; select bank 1
+; MOVLW .255
+; MOVWF PR2 ^ BANK1 ; set period = Fosc/4/pre-scaler/(PR2+1)
+; BCF TRISC ^ BANK1,2 ; set CCP1 pin as output
+; banksel PIR1 ; back to bank 0
+; MOVLW B'001100'
+; MOVWF CCP1CON ^ BANK0 ; set PWM mode (the 2 LSBs of the duty cycle are set to '00')
+; BSF T2CON ^ BANK0,TMR2ON ; Timer2 starts to increment
+
+ ; The CCP1 interrupt is disabled,
+ ; do polling on the TMR2 Interrupt flag bit
+;PWM_Period_Match
+; BTFSS PIR1, TMR2IF
+; GOTO PWM_Period_Match
+
+ ; Update this PWM period and the following PWM Duty cycle
+; BCF PIR1, TMR2IF
+
+; initialize variables
+ movlw B00000101'
+ movwf ledB
+ movlw .10
+ movwf count
+
+; loop forever
+ goto $
+
+;**********************************************************************
+ END \ No newline at end of file
diff --git a/test/gputils/compile_error/compile_error.piklab b/test/gputils/compile_error/compile_error.piklab
new file mode 100644
index 0000000..a5d6ad4
--- /dev/null
+++ b/test/gputils/compile_error/compile_error.piklab
@@ -0,0 +1,74 @@
+<!DOCTYPE piklab>
+<piklab>
+ <general>
+ <files>
+ <item>blinker.asm</item>
+ </files>
+ <version>0.1</version>
+ <description/>
+ <device>16F877</device>
+ <tool>gputils</tool>
+ <custom_linker_script/>
+ <opened_files>
+ <item>blinker.asm</item>
+ </opened_files>
+ </general>
+ <assembler>
+ <warning_level>0</warning_level>
+ <include_dir/>
+ <custom_options/>
+ <has_custom_arguments>false</has_custom_arguments>
+ <custom_arguments>
+ <item>-c</item>
+ <item>-I$(SRCPATH)</item>
+ <item>-p%DEVICE</item>
+ <item>-w1</item>
+ <item>%I</item>
+ </custom_arguments>
+ <includes>
+ <item>$(SRCPATH)</item>
+ </includes>
+ </assembler>
+ <linker>
+ <debug>0</debug>
+ <hex_format>inhx32</hex_format>
+ <object_dir/>
+ <custom_options/>
+ <format>inhx32</format>
+ <custom_linker_script>/home/nicolas/prog/piklab/piklab/test/sdcc/16f873.lkr</custom_linker_script>
+ <has_custom_arguments>false</has_custom_arguments>
+ <custom_libraries/>
+ <includes>
+ <item>$(SRCPATH)</item>
+ </includes>
+ <custom_arguments>
+ <item>-o%O</item>
+ <item>-c</item>
+ <item>-ainhx32</item>
+ <item>-m</item>
+ <item>-I$(SRCPATH)</item>
+ <item>$LKR(-s%LKR)</item>
+ <item>%OBJS</item>
+ <item>%LIBS</item>
+ </custom_arguments>
+ </linker>
+ <sdcc>
+ <custom_options/>
+ <include_dir/>
+ </sdcc>
+ <compiler>
+ <has_custom_arguments>false</has_custom_arguments>
+ <custom_options/>
+ <warning_level>0</warning_level>
+ <custom_arguments>
+ <item>-I$(SRCPATH)</item>
+ <item>-I</item>
+ <item>-p</item>
+ <item>%DEVICE</item>
+ <item>%I</item>
+ </custom_arguments>
+ <includes>
+ <item>$(SRCPATH)</item>
+ </includes>
+ </compiler>
+</piklab>
diff --git a/test/gputils/project/test.asm b/test/gputils/project/test.asm
new file mode 100644
index 0000000..e4fcbe8
--- /dev/null
+++ b/test/gputils/project/test.asm
@@ -0,0 +1,60 @@
+; list p=16f877
+ #include <p16f871.inc>
+ #include <test.inc>
+
+ __CONFIG _CP_OFF & _WDT_OFF & _BODEN_OFF & _PWRTE_ON & _RC_OSC & _WRT_ENABLE_ON & _LVP_ON & _CPD_OFF
+
+;**********************************************************************
+BANK0 = 0x0
+BANK1 = 0x80
+BANK2 = 0x100
+BANK3 = 0x180
+
+;**********************************************************************
+INT_VAR UDATA_SHR
+w_saved RES 1 ; variable used for context saving
+status_saved RES 1 ; variable used for context saving
+
+TEMP_VAR UDATA_SHR 0x20
+index RES 1
+
+;**********************************************************************
+STARTUP CODE ; processor reset vector
+ nop ; for debugger
+ movlw high start ; load upper byte of 'start' label
+ movwf PCLATH ; initialize PCLATH
+ goto start ; go to beginning of program
+
+;**********************************************************************
+INT_VECTOR CODE 0x0004 ; interrupt vector location
+ movwf w_saved
+ movfw STATUS
+ movwf status_saved
+
+ bcf INTCON,2 ; reset TMR0 interrupt flag
+ bsf PORTB,0
+
+ movfw status_saved
+ movwf STATUS
+ swapf w_saved,f
+ swapf w_saved,w
+ retfie ; return from interrupt
+
+;**********************************************************************
+MAIN CODE
+start
+; initialize microchip
+ clrf TMR0 ^ BANK0
+ clrf INTCON ^ BANK0
+ banksel TRISA ; bank 1
+ movlw B'11010100' ; set prescaler at 32 (32768 Hz / 4 / 256 / 32 = 1 Hz)
+ movwf OPTION_REG ^ BANK1 ; and start TMR0 (internal source clock)
+ movlw B'00000110' ; set PORTA and PORTE to be all digital
+ movwf ADCON1 ^ BANK1
+ banksel INTCON ; back to bank 0
+ bsf INTCON,T0IE ; enable TMR0 interrupt
+ bsf INTCON,GIE ; enable all interrupts
+
+ nop
+
+ END ; directive 'end of program'
diff --git a/test/gputils/project/test.inc b/test/gputils/project/test.inc
new file mode 100644
index 0000000..e956bd9
--- /dev/null
+++ b/test/gputils/project/test.inc
@@ -0,0 +1 @@
+; empty
diff --git a/test/gputils/project/test.lib b/test/gputils/project/test.lib
new file mode 100644
index 0000000..d0050e3
--- /dev/null
+++ b/test/gputils/project/test.lib
Binary files differ
diff --git a/test/gputils/project/test2.asm b/test/gputils/project/test2.asm
new file mode 100644
index 0000000..6a9ed66
--- /dev/null
+++ b/test/gputils/project/test2.asm
@@ -0,0 +1,6 @@
+MAIN CODE
+
+; loop forever
+ goto $
+ END ; directive 'end of program'
+
diff --git a/test/gputils/project/test_project.piklab b/test/gputils/project/test_project.piklab
new file mode 100644
index 0000000..2a26260
--- /dev/null
+++ b/test/gputils/project/test_project.piklab
@@ -0,0 +1,52 @@
+<!DOCTYPE piklab>
+<piklab>
+ <general>
+ <files>
+ <item>test.asm</item>
+ <item>test.lib</item>
+ <item>test2.asm</item>
+ </files>
+ <version>0.2</version>
+ <description/>
+ <device>16F871</device>
+ <tool>gputils</tool>
+ <opened_files>
+ <item>test.asm</item>
+ <item>test2.asm</item>
+ </opened_files>
+ </general>
+ <assembler>
+ <warning_level>0</warning_level>
+ <custom_options/>
+ <has_custom_arguments>false</has_custom_arguments>
+ <custom_arguments>
+ <item>-c</item>
+ <item>-I$(SRCPATH)</item>
+ <item>-p%DEVICE</item>
+ <item>-w0</item>
+ <item>%I</item>
+ </custom_arguments>
+ <includes>
+ <item>$(SRCPATH)</item>
+ </includes>
+ </assembler>
+ <linker>
+ <format>inhx32</format>
+ <custom_options/>
+ <has_custom_arguments>false</has_custom_arguments>
+ <custom_arguments>
+ <item>-o%O</item>
+ <item>-c</item>
+ <item>-ainhx32</item>
+ <item>-m</item>
+ <item>-I$(SRCPATH)</item>
+ <item>$LKR(-s%LKR)</item>
+ <item>%OBJS</item>
+ <item>%LIBS</item>
+ </custom_arguments>
+ </linker>
+ <compiler>
+ <includes>$(SRCPATH)</includes>
+ <custom_options/>
+ </compiler>
+</piklab>
diff --git a/test/gputils/project/test_project.pikprj b/test/gputils/project/test_project.pikprj
new file mode 100644
index 0000000..341ea8d
--- /dev/null
+++ b/test/gputils/project/test_project.pikprj
@@ -0,0 +1,20 @@
+[Assembler]
+include-dir=
+other-options=
+radix=dec
+target-device=16F871
+warn-level=0
+
+[Files]
+inputFiles=test.asm,test2.asm,test.lib
+
+[General]
+description=
+output=test_project.hex
+version=0.1
+
+[Linker]
+debug=false
+hex-format=inhx32
+objs-libs-dir=
+other-options=
diff --git a/test/gputils/standalone/test_stand_alone.asm b/test/gputils/standalone/test_stand_alone.asm
new file mode 100644
index 0000000..27e607a
--- /dev/null
+++ b/test/gputils/standalone/test_stand_alone.asm
@@ -0,0 +1,53 @@
+ list p=16f877
+ #include <p16f877.inc>
+
+ __CONFIG _CP_ALL & _WDT_OFF & _BODEN_OFF & _PWRTE_ON & _RC_OSC & _WRT_ENABLE_ON & _LVP_ON & _CPD_OFF
+
+;**********************************************************************
+BANK0 = 0x0
+BANK1 = 0x80
+BANK2 = 0x100
+BANK3 = 0x180
+
+;**********************************************************************
+w_saved EQU 0x70 ; variable used for context saving
+status_saved EQU 0x71 ; variable used for context saving
+index EQU 0x20
+
+;**********************************************************************
+ ORG 0x000 ; processor reset vector
+ movlw high start ; load upper byte of 'start' label
+ movwf PCLATH ; initialize PCLATH
+ goto start ; go to beginning of program
+
+;**********************************************************************
+ ORG 0x004 ; interrupt vector location
+ movwf w_saved
+ movfw STATUS
+ movwf status_saved
+
+ bcf INTCON,2 ; reset TMR0 interrupt flag
+
+ movfw status_saved
+ movwf STATUS
+ swapf w_saved,f
+ swapf w_saved,w
+ retfie ; return from interrupt
+
+;**********************************************************************
+start
+; initialize microchip
+ clrf TMR0 ^ BANK0
+ clrf INTCON ^ BANK0
+ banksel TRISA ; bank 1
+ movlw B'11010100' ; set prescaler at 32 (32768 Hz / 4 / 256 / 32 = 1 Hz)
+ movwf OPTION_REG ^ BANK1 ; and start TMR0 (internal source clock)
+ movlw B'00000110' ; set PORTA and PORTE to be all digital
+ movwf ADCON1 ^ BANK1
+ banksel INTCON ; back to bank 0
+ bsf INTCON,T0IE ; enable TMR0 interrupt
+ bsf INTCON,GIE ; enable all interrupts
+
+; loop forever
+ goto $
+ END ; directive 'end of program'