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authorMichele Calgaro <michele.calgaro@yahoo.it>2014-03-03 00:41:25 +0900
committerMichele Calgaro <michele.calgaro@yahoo.it>2014-03-03 00:41:25 +0900
commitbb647dca1516a45ce18f2e040bd20528f588e2fe (patch)
tree0fe5d9a19e884335a14fdf9741f772b2474df43e /kate/data/verilog.xml
parenta7e4c6b5e7916d924c2a9b75a10e427b556b8d65 (diff)
downloadtdelibs-bb647dca1516a45ce18f2e040bd20528f588e2fe.tar.gz
tdelibs-bb647dca1516a45ce18f2e040bd20528f588e2fe.zip
Kate syntax highlighting files update - Feb 2014
Diffstat (limited to 'kate/data/verilog.xml')
-rw-r--r--kate/data/verilog.xml2
1 files changed, 1 insertions, 1 deletions
diff --git a/kate/data/verilog.xml b/kate/data/verilog.xml
index 04908146c..12619f2e8 100644
--- a/kate/data/verilog.xml
+++ b/kate/data/verilog.xml
@@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE language SYSTEM "language.dtd">
-<language name="Verilog" version="1.10" kateversion="2.5" section="Hardware" extensions="*.v;*.V;*.vl" mimetype="text/x-verilog-src" author="Yevgen Voronenko (ysv22@drexel.edu), Ryan Dalzell (ryan@tullyroan.com)" license="">
+<language name="Verilog" version="1.09" kateversion="2.4" section="Hardware" extensions="*.v;*.V;*.vl" mimetype="text/x-verilog-src" author="Yevgen Voronenko (ysv22@drexel.edu), Ryan Dalzell (ryan@tullyroan.com)" license="">
<highlighting>
<list name="keywords">
<item> macromodule </item>