diff options
Diffstat (limited to 'src/coff')
-rw-r--r-- | src/coff/base/disassembler.cpp | 24 | ||||
-rw-r--r-- | src/coff/base/gpdis.cpp | 14 | ||||
-rw-r--r-- | src/coff/base/gpopcode.h | 2 |
3 files changed, 20 insertions, 20 deletions
diff --git a/src/coff/base/disassembler.cpp b/src/coff/base/disassembler.cpp index 9790843..7515b71 100644 --- a/src/coff/base/disassembler.cpp +++ b/src/coff/base/disassembler.cpp @@ -126,10 +126,10 @@ TQStringList SourceLine::configNames(Pic::ConfigNameType type, const Pic::Memory const Pic::Config::Word &cword = config._words[word]; TQStringList cnames; for (uint k=0; k<uint(cword.masks.count()); k++) { - const Pic::Config::Mask &ctqmask = cword.masks[k]; - if ( ctqmask.value.isInside(cword.ptqmask) ) continue; // protected bits - for (int l=ctqmask.values.count()-1; l>=0; l--) { - const Pic::Config::Value &cvalue = ctqmask.values[l]; + const Pic::Config::Mask &cmask = cword.masks[k]; + if ( cmask.value.isInside(cword.pmask) ) continue; // protected bits + for (int l=cmask.values.count()-1; l>=0; l--) { + const Pic::Config::Value &cvalue = cmask.values[l]; if ( !cvalue.value.isInside(v) ) continue; TQStringList vcnames = cvalue.configNames[type]; if ( vcnames.isEmpty() && type!=Pic::ConfigNameType::Default ) vcnames = cvalue.configNames[Pic::ConfigNameType::Default]; @@ -192,8 +192,8 @@ SourceLine::List GPUtils::disassemble(const Pic::Memory &memory) bool isDefault = true; for (uint k=0; k<data.nbWords(Pic::MemoryRangeType::Config); k++) { BitValue op = memory.normalizedWord(Pic::MemoryRangeType::Config, k); - BitValue tqmask = data.config()._words[k].usedMask(); - if ( !tqmask.isInside(op) ) isDefault = false; // this is not completely correct but otherwise empty config is written... + BitValue mask = data.config()._words[k].usedMask(); + if ( !mask.isInside(op) ) isDefault = false; // this is not completely correct but otherwise empty config is written... } if ( !isDefault ) { lines.appendEmpty(); @@ -206,8 +206,8 @@ SourceLine::List GPUtils::disassemble(const Pic::Memory &memory) TQString tmp; for (uint k=0; k<data.nbWords(Pic::MemoryRangeType::UserId); k++) { BitValue op = memory.normalizedWord(Pic::MemoryRangeType::UserId, k); - BitValue tqmask = data.userIdRecommendedMask(); - if ( tqmask.isInside(op) ) continue; + BitValue mask = data.userIdRecommendedMask(); + if ( mask.isInside(op) ) continue; if ( data.is18Family() ) { Address ad = data.range(Pic::MemoryRangeType::UserId).start + data.range(Pic::MemoryRangeType::UserId).hexFileOffset + k*data.addressIncrement(Pic::MemoryRangeType::UserId); lines.appendIndentedCode("__IDLOCS " + toHexLabel(ad, data.nbCharsAddress()) + ", " + toHexLabel(op, data.nbCharsWord(Pic::MemoryRangeType::UserId))); @@ -227,8 +227,8 @@ SourceLine::List GPUtils::disassemble(const Pic::Memory &memory) uint nb = data.nbWords(Pic::MemoryRangeType::Code); for (uint k=0; k<nb; k++) { BitValue op = memory.normalizedWord(Pic::MemoryRangeType::Code, k); - BitValue tqmask = data.tqmask(Pic::MemoryRangeType::Code); - if ( tqmask.isInside(op) ) newOrg = true; + BitValue mask = data.mask(Pic::MemoryRangeType::Code); + if ( mask.isInside(op) ) newOrg = true; else { if (newOrg) { if ( !first ) tmp += '\n'; @@ -254,8 +254,8 @@ SourceLine::List GPUtils::disassemble(const Pic::Memory &memory) nb = data.nbWords(Pic::MemoryRangeType::Eeprom); for (uint k=0; k<nb; k++) { BitValue op = memory.normalizedWord(Pic::MemoryRangeType::Eeprom, k); - BitValue tqmask = data.tqmask(Pic::MemoryRangeType::Eeprom); - if ( tqmask.isInside(op) ) newOrg = true; + BitValue mask = data.mask(Pic::MemoryRangeType::Eeprom); + if ( mask.isInside(op) ) newOrg = true; else { if (newOrg) { Address org = data.range(Pic::MemoryRangeType::Eeprom).start + data.range(Pic::MemoryRangeType::Eeprom).hexFileOffset + k*data.addressIncrement(Pic::MemoryRangeType::Eeprom); diff --git a/src/coff/base/gpdis.cpp b/src/coff/base/gpdis.cpp index abec54f..2df4f24 100644 --- a/src/coff/base/gpdis.cpp +++ b/src/coff/base/gpdis.cpp @@ -69,7 +69,7 @@ int Coff::disassemble(long int opcode, long int opcode2, return 0; case Pic::Architecture::P10X: for(i = 0; i < num_op_12c5xx; i++) { - if((op_12c5xx[i].tqmask & opcode) == op_12c5xx[i].opcode) { + if((op_12c5xx[i].mask & opcode) == op_12c5xx[i].opcode) { instruction = &op_12c5xx[i]; break; } @@ -77,7 +77,7 @@ int Coff::disassemble(long int opcode, long int opcode2, break; /* case PROC_CLASS_SX: for(i = 0; i < num_op_sx; i++) { - if((op_sx[i].tqmask & opcode) == op_sx[i].opcode) { + if((op_sx[i].mask & opcode) == op_sx[i].opcode) { instruction = &op_sx[i]; break; } @@ -86,7 +86,7 @@ int Coff::disassemble(long int opcode, long int opcode2, */ case Pic::Architecture::P16X: for(i = 0; i < num_op_16cxx; i++) { - if((op_16cxx[i].tqmask & opcode) == op_16cxx[i].opcode) { + if((op_16cxx[i].mask & opcode) == op_16cxx[i].opcode) { instruction = &op_16cxx[i]; break; } @@ -94,7 +94,7 @@ int Coff::disassemble(long int opcode, long int opcode2, break; case Pic::Architecture::P17C: for(i = 0; i < num_op_17cxx; i++) { - if((op_17cxx[i].tqmask & opcode) == op_17cxx[i].opcode) { + if((op_17cxx[i].mask & opcode) == op_17cxx[i].opcode) { instruction = &op_17cxx[i]; break; } @@ -105,7 +105,7 @@ int Coff::disassemble(long int opcode, long int opcode2, case Pic::Architecture::P18J: if (gp_decode_mnemonics) { for(i = 0; i < num_op_18cxx_sp; i++) { - if((op_18cxx_sp[i].tqmask & opcode) == op_18cxx_sp[i].opcode) { + if((op_18cxx_sp[i].mask & opcode) == op_18cxx_sp[i].opcode) { instruction = &op_18cxx_sp[i]; break; } @@ -113,7 +113,7 @@ int Coff::disassemble(long int opcode, long int opcode2, } if (instruction == NULL) { for(i = 0; i < num_op_18cxx; i++) { - if((op_18cxx[i].tqmask & opcode) == op_18cxx[i].opcode) { + if((op_18cxx[i].mask & opcode) == op_18cxx[i].opcode) { instruction = &op_18cxx[i]; break; } @@ -122,7 +122,7 @@ int Coff::disassemble(long int opcode, long int opcode2, if ((instruction == NULL) && (gp_decode_extended)) { /* might be from the extended instruction set */ for(i = 0; i < num_op_18cxx_ext; i++) { - if((op_18cxx_ext[i].tqmask & opcode) == op_18cxx_ext[i].opcode) { + if((op_18cxx_ext[i].mask & opcode) == op_18cxx_ext[i].opcode) { instruction = &op_18cxx_ext[i]; break; } diff --git a/src/coff/base/gpopcode.h b/src/coff/base/gpopcode.h index 91a4dea..aed25f9 100644 --- a/src/coff/base/gpopcode.h +++ b/src/coff/base/gpopcode.h @@ -75,7 +75,7 @@ enum insn_class { struct insn { const char *name; - long int tqmask; + long int mask; long int opcode; enum insn_class classType; //int attribs; |