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-rw-r--r--src/devices/pic/xml_data/18F8620.xml154
1 files changed, 77 insertions, 77 deletions
diff --git a/src/devices/pic/xml_data/18F8620.xml b/src/devices/pic/xml_data/18F8620.xml
index fe596c1..8503556 100644
--- a/src/devices/pic/xml_data/18F8620.xml
+++ b/src/devices/pic/xml_data/18F8620.xml
@@ -37,17 +37,17 @@
<!--* Memory ***************************************************************-->
<memory name="code" start="0x000000" end="0x00FFFF" word_write_align="4" word_erase_align="32" />
- <memory name="user_ids" start="0x200000" end="0x200007" rtqmask="0x0F" />
+ <memory name="user_ids" start="0x200000" end="0x200007" rmask="0x0F" />
<memory name="device_id" start="0x3FFFFE" end="0x3FFFFF" />
<memory name="config" start="0x300000" end="0x30000D" />
<memory name="eeprom" start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
<memory name="debug_vector" start="0x200028" end="0x200037" />
<!--* Configuration bits ***************************************************-->
- <config offset="0x0" name="CONFIG1L" wtqmask="0xFF" bvalue="0x00" />
+ <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
- <config offset="0x1" name="CONFIG1H" wtqmask="0xFF" bvalue="0x27" >
- <tqmask name="FOSC" value="0x07" >
+ <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x27" >
+ <mask name="FOSC" value="0x07" >
<value value="0x00" name="LP" cname="_LP_OSC" sdcc_cname="_OSC_LP" />
<value value="0x01" name="XT" cname="_XT_OSC" sdcc_cname="_OSC_XT" />
<value value="0x02" name="HS" cname="_HS_OSC" sdcc_cname="_OSC_HS" />
@@ -56,36 +56,36 @@
<value value="0x05" name="EC_IO" cname="_ECIO_OSC" sdcc_cname="_OSC_EC_OSC2_RA6" />
<value value="0x06" name="H4" cname="_HSPLL_OSC" sdcc_cname="_OSC_HS_PLL" />
<value value="0x07" name="EXTRC_IO" cname="_RCIO_OSC" sdcc_cname="_OSC_RC_OSC2" />
- </tqmask>
- <tqmask name="OSCSEN" value="0x20" >
+ </mask>
+ <mask name="OSCSEN" value="0x20" >
<value value="0x00" name="On" cname="_OSCS_ON" />
<value value="0x20" name="Off" cname="_OSCS_OFF" />
- </tqmask>
+ </mask>
</config>
- <config offset="0x2" name="CONFIG2L" wtqmask="0xFF" bvalue="0x0F" >
- <tqmask name="PWRTE" value="0x01" >
+ <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+ <mask name="PWRTE" value="0x01" >
<value value="0x00" name="On" cname="_PWRT_ON" sdcc_cname="_PUT_ON" />
<value value="0x01" name="Off" cname="_PWRT_OFF" sdcc_cname="_PUT_OFF" />
- </tqmask>
- <tqmask name="BODEN" value="0x02" >
+ </mask>
+ <mask name="BODEN" value="0x02" >
<value value="0x00" name="Off" cname="_BOR_OFF" sdcc_cname="_BODEN_OFF" />
<value value="0x02" name="On" cname="_BOR_ON" sdcc_cname="_BODEN_ON" />
- </tqmask>
- <tqmask name="BORV" value="0x0C" >
+ </mask>
+ <mask name="BORV" value="0x0C" >
<value value="0x00" name="4.5" cname="_BORV_45" sdcc_cname="_BODENV_4_5V" />
<value value="0x04" name="4.2" cname="_BORV_42" sdcc_cname="_BODENV_4_2V" />
<value value="0x08" name="2.7" cname="_BORV_27" sdcc_cname="_BODENV_2_7V" />
<value value="0x0C" name="2.5" cname="_BORV_20" sdcc_cname="_BODENV_2_5V" />
- </tqmask>
+ </mask>
</config>
- <config offset="0x3" name="CONFIG2H" wtqmask="0xFF" bvalue="0x0F" >
- <tqmask name="WDT" value="0x01" >
+ <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+ <mask name="WDT" value="0x01" >
<value value="0x00" name="Off" cname="_WDT_OFF" />
<value value="0x01" name="On" cname="_WDT_ON" />
- </tqmask>
- <tqmask name="WDTPS" value="0x0E" >
+ </mask>
+ <mask name="WDTPS" value="0x0E" >
<value value="0x00" name="1:1" cname="_WDTPS_1" sdcc_cname="_WDTPS_1_1" />
<value value="0x02" name="1:2" cname="_WDTPS_2" sdcc_cname="_WDTPS_1_2" />
<value value="0x04" name="1:4" cname="_WDTPS_4" sdcc_cname="_WDTPS_1_4" />
@@ -94,134 +94,134 @@
<value value="0x0A" name="1:32" cname="_WDTPS_32" sdcc_cname="_WDTPS_1_32" />
<value value="0x0C" name="1:64" cname="_WDTPS_64" sdcc_cname="_WDTPS_1_64" />
<value value="0x0E" name="1:128" cname="_WDTPS_128" sdcc_cname="_WDTPS_1_128" />
- </tqmask>
+ </mask>
</config>
- <config offset="0x4" name="CONFIG3L" wtqmask="0xFF" bvalue="0x83" >
- <tqmask name="PM" value="0x03" >
+ <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x83" >
+ <mask name="PM" value="0x03" >
<value value="0x00" name="Extended microcontroller" cname="_XMC_MODE" sdcc_cname="_PMODE_EXT" />
<value value="0x01" name="Microprocessor with boot" cname="_MPB_MODE" sdcc_cname="_PMODE_MICROPROCESSOR_w_Boot" />
<value value="0x02" name="Microprocessor" cname="_MP_MODE" sdcc_cname="_PMODE_MICROPROCESSOR_" />
<value value="0x03" name="Microcontroller" cname="_MC_MODE" sdcc_cname="_PMODE_MICROCONTROLLER" />
- </tqmask>
- <tqmask name="WAIT" value="0x80" >
+ </mask>
+ <mask name="WAIT" value="0x80" >
<value value="0x00" name="On" cname="_WAIT_ON" />
<value value="0x80" name="Off" cname="_WAIT_OFF" />
- </tqmask>
+ </mask>
</config>
- <config offset="0x5" name="CONFIG3H" wtqmask="0xFF" bvalue="0x01" >
- <tqmask name="CCP2MX" value="0x01" >
+ <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+ <mask name="CCP2MX" value="0x01" >
<value value="0x00" name="RE7" cname="_CCP2MX_OFF" sdcc_cname="_CCP2MUX_RE7_MICROCONTROLLER__RB3" />
<value value="0x01" name="RC1" cname="_CCP2MX_ON" sdcc_cname="_CCP2MUX_RC1" />
- </tqmask>
+ </mask>
</config>
- <config offset="0x6" name="CONFIG4L" wtqmask="0xFF" bvalue="0x85" >
- <tqmask name="STVREN" value="0x01" >
+ <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+ <mask name="STVREN" value="0x01" >
<value value="0x00" name="Off" cname="_STVR_OFF" />
<value value="0x01" name="On" cname="_STVR_ON" />
- </tqmask>
- <tqmask name="LVP" value="0x04" >
+ </mask>
+ <mask name="LVP" value="0x04" >
<value value="0x00" name="Off" cname="_LVP_OFF" />
<value value="0x04" name="On" cname="_LVP_ON" />
- </tqmask>
- <tqmask name="DEBUG" value="0x80" >
+ </mask>
+ <mask name="DEBUG" value="0x80" >
<value value="0x00" name="On" cname="_DEBUG_ON" sdcc_cname="_BACKBUG_ON" />
<value value="0x80" name="Off" cname="_DEBUG_OFF" sdcc_cname="_BACKBUG_OFF" />
- </tqmask>
+ </mask>
</config>
- <config offset="0x7" name="CONFIG4H" wtqmask="0xFF" bvalue="0x00" />
+ <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
- <config offset="0x8" name="CONFIG5L" wtqmask="0xFF" bvalue="0x0F" >
- <tqmask name="CP_0" value="0x01" >
+ <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+ <mask name="CP_0" value="0x01" >
<value value="0x00" name="0200:3FFF" cname="_CP0_ON" sdcc_cname="_CP_0_ON" />
<value value="0x01" name="Off" cname="_CP0_OFF" sdcc_cname="_CP_0_OFF" />
- </tqmask>
- <tqmask name="CP_1" value="0x02" >
+ </mask>
+ <mask name="CP_1" value="0x02" >
<value value="0x00" name="4000:7FFF" cname="_CP1_ON" sdcc_cname="_CP_1_ON" />
<value value="0x02" name="Off" cname="_CP1_OFF" sdcc_cname="_CP_1_OFF" />
- </tqmask>
- <tqmask name="CP_2" value="0x04" >
+ </mask>
+ <mask name="CP_2" value="0x04" >
<value value="0x00" name="8000:BFFF" cname="_CP2_ON" sdcc_cname="_CP_2_ON" />
<value value="0x04" name="Off" cname="_CP2_OFF" sdcc_cname="_CP_2_OFF" />
- </tqmask>
- <tqmask name="CP_3" value="0x08" >
+ </mask>
+ <mask name="CP_3" value="0x08" >
<value value="0x00" name="C000:FFFF" cname="_CP3_ON" sdcc_cname="_CP_3_ON" />
<value value="0x08" name="Off" cname="_CP3_OFF" sdcc_cname="_CP_3_OFF" />
- </tqmask>
+ </mask>
</config>
- <config offset="0x9" name="CONFIG5H" wtqmask="0xFF" bvalue="0xC0" >
- <tqmask name="CPB" value="0x40" >
+ <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+ <mask name="CPB" value="0x40" >
<value value="0x00" name="0000:01FF" cname="_CPB_ON" />
<value value="0x40" name="Off" cname="_CPB_OFF" />
- </tqmask>
- <tqmask name="CPD" value="0x80" >
+ </mask>
+ <mask name="CPD" value="0x80" >
<value value="0x00" name="All" cname="_CPD_ON" />
<value value="0x80" name="Off" cname="_CPD_OFF" />
- </tqmask>
+ </mask>
</config>
- <config offset="0xA" name="CONFIG6L" wtqmask="0xFF" bvalue="0x0F" >
- <tqmask name="WRT_0" value="0x01" >
+ <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+ <mask name="WRT_0" value="0x01" >
<value value="0x00" name="0200:3FFF" cname="_WRT0_ON" sdcc_cname="_WRT_0_ON" />
<value value="0x01" name="Off" cname="_WRT0_OFF" sdcc_cname="_WRT_0_OFF" />
- </tqmask>
- <tqmask name="WRT_1" value="0x02" >
+ </mask>
+ <mask name="WRT_1" value="0x02" >
<value value="0x00" name="4000:7FFF" cname="_WRT1_ON" sdcc_cname="_WRT_1_ON" />
<value value="0x02" name="Off" cname="_WRT1_OFF" sdcc_cname="_WRT_1_OFF" />
- </tqmask>
- <tqmask name="WRT_2" value="0x04" >
+ </mask>
+ <mask name="WRT_2" value="0x04" >
<value value="0x00" name="8000:BFFF" cname="_WRT2_ON" sdcc_cname="_WRT_2_ON" />
<value value="0x04" name="Off" cname="_WRT2_OFF" sdcc_cname="_WRT_2_OFF" />
- </tqmask>
- <tqmask name="WRT_3" value="0x08" >
+ </mask>
+ <mask name="WRT_3" value="0x08" >
<value value="0x00" name="C000:FFFF" cname="_WRT3_ON" sdcc_cname="_WRT_3_ON" />
<value value="0x08" name="Off" cname="_WRT3_OFF" sdcc_cname="_WRT_3_OFF" />
- </tqmask>
+ </mask>
</config>
- <config offset="0xB" name="CONFIG6H" wtqmask="0xFF" bvalue="0xE0" >
- <tqmask name="WRTC" value="0x20" >
+ <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+ <mask name="WRTC" value="0x20" >
<value value="0x00" name="All" cname="_WRTC_ON" />
<value value="0x20" name="Off" cname="_WRTC_OFF" />
- </tqmask>
- <tqmask name="WRTB" value="0x40" >
+ </mask>
+ <mask name="WRTB" value="0x40" >
<value value="0x00" name="0000:01FF" cname="_WRTB_ON" />
<value value="0x40" name="Off" cname="_WRTB_OFF" />
- </tqmask>
- <tqmask name="WRTD" value="0x80" >
+ </mask>
+ <mask name="WRTD" value="0x80" >
<value value="0x00" name="All" cname="_WRTD_ON" />
<value value="0x80" name="Off" cname="_WRTD_OFF" />
- </tqmask>
+ </mask>
</config>
- <config offset="0xC" name="CONFIG7L" wtqmask="0xFF" bvalue="0x0F" >
- <tqmask name="EBTR_0" value="0x01" >
+ <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+ <mask name="EBTR_0" value="0x01" >
<value value="0x00" name="0200:3FFF" cname="_EBTR0_ON" sdcc_cname="_EBTR_0_ON" />
<value value="0x01" name="Off" cname="_EBTR0_OFF" sdcc_cname="_EBTR_0_OFF" />
- </tqmask>
- <tqmask name="EBTR_1" value="0x02" >
+ </mask>
+ <mask name="EBTR_1" value="0x02" >
<value value="0x00" name="4000:7FFF" cname="_EBTR1_ON" sdcc_cname="_EBTR_1_ON" />
<value value="0x02" name="Off" cname="_EBTR1_OFF" sdcc_cname="_EBTR_1_OFF" />
- </tqmask>
- <tqmask name="EBTR_2" value="0x04" >
+ </mask>
+ <mask name="EBTR_2" value="0x04" >
<value value="0x00" name="8000:BFFF" cname="_EBTR2_ON" sdcc_cname="_EBTR_2_ON" />
<value value="0x04" name="Off" cname="_EBTR2_OFF" sdcc_cname="_EBTR_2_OFF" />
- </tqmask>
- <tqmask name="EBTR_3" value="0x08" >
+ </mask>
+ <mask name="EBTR_3" value="0x08" >
<value value="0x00" name="C000:FFFF" cname="_EBTR3_ON" sdcc_cname="_EBTR_3_ON" />
<value value="0x08" name="Off" cname="_EBTR3_OFF" sdcc_cname="_EBTR_3_OFF" />
- </tqmask>
+ </mask>
</config>
- <config offset="0xD" name="CONFIG7H" wtqmask="0xFF" bvalue="0x40" >
- <tqmask name="EBTRB" value="0x40" >
+ <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+ <mask name="EBTRB" value="0x40" >
<value value="0x00" name="0000:01FF" cname="_EBTRB_ON" />
<value value="0x40" name="Off" cname="_EBTRB_OFF" />
- </tqmask>
+ </mask>
</config>
<!--* Packages *************************************************************-->