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author | Michele Calgaro <michele.calgaro@yahoo.it> | 2014-01-09 00:24:34 +0100 |
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committer | Slávek Banko <slavek.banko@axis.cz> | 2015-12-23 02:22:36 +0100 |
commit | 5529b46d246d14c973bc13fe30b414b9bec7f7c0 (patch) | |
tree | 2503f2ed35d65e6bbb2b4ab1b280b0c7ce6a0ca1 /kate/data/verilog.xml | |
parent | a929e576b23f51fef432252e0b70a24fd00b1ee6 (diff) | |
download | tdelibs-5529b46d246d14c973bc13fe30b414b9bec7f7c0.tar.gz tdelibs-5529b46d246d14c973bc13fe30b414b9bec7f7c0.zip |
Update kate syntax highlight files
(cherry picked from commit bf4e405e03859bf383f55715944f4f71bd338c34)
Diffstat (limited to 'kate/data/verilog.xml')
-rw-r--r-- | kate/data/verilog.xml | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/kate/data/verilog.xml b/kate/data/verilog.xml index 12619f2e8..04908146c 100644 --- a/kate/data/verilog.xml +++ b/kate/data/verilog.xml @@ -1,6 +1,6 @@ <?xml version="1.0" encoding="UTF-8"?> <!DOCTYPE language SYSTEM "language.dtd"> -<language name="Verilog" version="1.09" kateversion="2.4" section="Hardware" extensions="*.v;*.V;*.vl" mimetype="text/x-verilog-src" author="Yevgen Voronenko (ysv22@drexel.edu), Ryan Dalzell (ryan@tullyroan.com)" license=""> +<language name="Verilog" version="1.10" kateversion="2.5" section="Hardware" extensions="*.v;*.V;*.vl" mimetype="text/x-verilog-src" author="Yevgen Voronenko (ysv22@drexel.edu), Ryan Dalzell (ryan@tullyroan.com)" license=""> <highlighting> <list name="keywords"> <item> macromodule </item> |