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-rw-r--r--fpga/gpmc/xilinx/common/data_storage.v19
1 files changed, 14 insertions, 5 deletions
diff --git a/fpga/gpmc/xilinx/common/data_storage.v b/fpga/gpmc/xilinx/common/data_storage.v
index b98fb25..f4393a6 100644
--- a/fpga/gpmc/xilinx/common/data_storage.v
+++ b/fpga/gpmc/xilinx/common/data_storage.v
@@ -8,19 +8,20 @@
module data_storage(
input clka,
- input [7:0] dina,
+ input [(RAM_WIDTH-1):0] dina,
input [(RAM_ADDR_BITS-1):0] addra,
input wea,
- output reg [7:0] douta);
+ output reg [(RAM_WIDTH-1):0] douta);
parameter RAM_ADDR_BITS = 14;
parameter RAM_WIDTH = 8;
-
+
// Xilinx specific directive
(* RAM_STYLE="BLOCK" *)
-
+
reg [RAM_WIDTH-1:0] data_storage_ram [(2**RAM_ADDR_BITS)-1:0];
-
+
+ // Registered
always @(posedge clka) begin
if (wea) begin
data_storage_ram[addra] <= dina;
@@ -30,4 +31,12 @@ module data_storage(
end
end
+// // Unregistered
+// always @(posedge clka) begin
+// if (wea) begin
+// data_storage_ram[addra] <= dina;
+// end
+// end
+// assign douta = data_storage_ram[addra];
+
endmodule