Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | Slow demo file 7-segment clock to a more reasonable KHz value | Timothy Pearson | 2019-04-28 | 1 | -104/+104 |
* | Fix incorrect pin assignment for 7-segment LED display | Timothy Pearson | 2019-04-28 | 1 | -2/+2 |
* | Enable remaining I/O busses on Lattice control FPGA | Timothy Pearson | 2019-04-28 | 1 | -1/+1 |
* | Add test program for Lattice guest FPGAs | Timothy Pearson | 2019-04-28 | 3 | -0/+333 |